Optimization consideration of undoped raised source/drain FinFET with effective SCE control

In this paper, we have simulated the different technology node FinFET devices and its electrical characteristics variation especially short channel effects (SCE). Raised source and drain (RSD) structure for parasitic resistance minimization with ultra thin undoped fin are used. This RSD reduces the series resistance without affecting SCEs in terms of drain induced barrier lowering (DIBL), subthreshold slope etc. At the same time, higher doping in RSD structure even though reduces the series resistance but increases the SCEs. However, an optimal doping in these regions can provide a better device performance in terms of drive current, leakage current, etc, keeping the SCEs within reasonable limits.