Wafer admission control for clustered photolithography tools

In semiconductor wafer manufacturing, clustered photolithography scanners frequently use pre-scan or post-scan wafer buffers to ensure that the scanner is seldom starved of wafers or blocked from further production. While such practice is essential to maximize the throughput of this costly tool, state-of-the-art methods for determining when to use the buffer are overly cautious. As a consequence, each wafer's residency time in the tool may be significantly larger than necessary and the time a lot spends inside the cluster is increased. Since satisfaction of time windows and reduction in wafer residency time in a tool will arguably improve yield and reduced lot process time will increase manufacturing deployment opportunities, we strive to minimize residency time while maintaining maximum throughput. To achieve our goal, we develop wafer admission control algorithms considering setups and transient operation. The output of the algorithm is suggested wafer entry times to the tool and is intended to be used by the wafer handling robot as a guideline. We simulate several representative systems to verify the performance of the approach. For a typical system, it is shown that, while maintaining throughput, the wafer residency time, the lot process time and the wafer buffer occupancy are reduced by 54%, 31% and 67%, respectively. The lot deployment opportunity in the same case is increased by 14%. As a consequence, there are fewer wafers for the wafer handling robots to serve and the tool may be designed with fewer buffer slots. The concept and algorithm will thus improve clustered photolithography performance in numerous ways.