On the baseband hardware complexity of modernized GNSS receivers

This paper discusses the resource and power requirements of baseband signal processing circuitry to process new Global Navigation Satellite Systems (GNSS) signals. The large signal bandwidth, multiple longer spreading codes and the split-spectrum modulations demand wider registers and wider accumulators at higher operating frequencies compared to the baseband hardware of the existing Global Positioning System (GPS) L1 Coarse/Acquisition (C/A) signal. Some of the signals with the memory spreading codes have a completely new requirement of up to 0.5 M memory bits. Implementation of the core baseband signal processing blocks in FPGA hardware reveals up to three times the resource requirement and up to thirty seven times the power consumption for high-end signals compared to the core baseband module of the existing L1 C/A signal.