Fault-isolation in portable electronics subjected to drop and shock

In this paper, a new technique has been developed for health monitoring and failure mode classification based on measured damage pre-cursors. A feature extraction technique in the joint-time frequency domain has been developed along with pattern classifiers for fault diagnosis of electronics at product-level. The Karhunen Loéve transform (KLT) has been used for feature reduction and de-correlation of the feature vectors for fault mode classification in electronic assemblies. Euclidean, and Mahalanobis, and Bayesian distance classifiers based on joint-time frequency analysis, have been used for classification of the resulting feature space. In this paper, various fault modes such as solder inter-connect failure, inter-connect missing, chip delamination, chip cracking etc in various packaging architectures have been classified using clustering of feature vectors based on the KLT approach. The clustered damage pre-cursors have been correlated with underlying damage. Several chip-scale packages have been studied, with lead free second-level interconnects including SAC105, SAC305 alloys. Transient strain has been measured during the drop-event using digital image correlation and high-speed cameras operating at 100,000 fps. Continuity has been monitored simultaneously for failure identification. Fault-mode classification has been done using KLT and joint-time- frequency analysis of the experimental data. In addition, explicit finite element models have been developed and various kinds of failure modes have been simulated such as solder ball cracking, trace fracture, package falloff and solder ball failure. Models using cohesive elements present at the solder joint-copper pad interface at both the PCB and package side have also been created to study the traction-separation behavior of solder. Fault modes predicted by simulation based pre-cursors have been correlated with those from experimental data.