Design of low noise fractional-N frequency synthesizer using sigma-delta modulation technique

The fractional-N frequency synthesis technique provides agile switching in narrow channel spacing systems and alleviates phase-locked loop (PLL) design constraints for phase noise and reference spur. A sigma-delta modulator is represented in this work which reduces spur in output frequency spectrum of the fractional-N frequency synthesizers (FS). This technique also improves the performance of the frequency synthesizer. A fractional-N frequency synthesizer is designed by employing a third-order MASH modulator. A fourth order type II PLL with two out of band poles are used to suppress quantization noise of the modulator. The in-band phase noise of -95 dBc/Hz at 10-kHz offset with a spur of less than -96 dBc is achieved with a reference frequency of 8 MHz and a loop bandwidth of 40 kHz.