A 100-MHz 10-mW All-NPN Sample-and-Hold Circuit with 3-V Supply

An all-npn open-loop sample-and-hold circuit employs capacitive coupling between input and output to allow differential voltage swings of 3 V in a 3.3-V system. Designed for use at the front end of analog-to-digital converters and fabricated in a 1.5-μm 12-GHz digital bipolar technology, the circuit exhibits harmonics 60 dB below the fundamental at a sampling rate of 100 MHz with a sinusoidal input of 10 MHz.