Learning from small data sets to improve assembly semiconductor manufacturing processes

The use of machine learning algorithms such as Gradient Boosting Trees (GBT) [1] and Random Forest (RF) [2] have enjoyed some successes [3, 4] for Intel class test yield prediction and analysis. However, we have not attempted it on Intel assembly data mainly due to the lack of Design of Experiment (DOE) data. In addition, it is a continual effort to reduce the cost of DOE for data-driven engineering decision. Clearly inadequacy of training data discourages proper machine learning for predictive modeling. We propose the use of machine learning algorithm to implement an adaptive-sequential (A-S) process and accuracy guard band concept for improved recipe generation process development. A chipset assembly process recipe generation process development use case is examined. It has demonstrated a 13–20 folds DOE sample size reduction with equal or better accuracy and coverage than the least square curve fitting method. The model is useful for accurate “What-if” process development simulation.