Design of a Dual-mode Clock Generator based on a PLL Structure

A Dual-mode clock generator based on a PLL(phase locked Loop)was proposed. The circuit, which provides 400 KHz internal fixed frequency mode and external input mode with a phase-lockable frequency range from 400 KHz to 2 MHz, is applicable to SMPS (Switching Mode Power Supply) controller IC to optimize its performance. A novel oscillation generator for low frequency application is introduced. The circuit was designed under 1.5 um BCD (Bipolar-CMOS-DMOS) process technology. The simulation results show the circuit works well and achieves all expected functions.