Memory fading Volterra series model for high power infrastructure amplifiers

This paper presents a novel technique of adapting the generalized Volterra series behavioral model to describe, with improved accuracy, power amplifiers targeting cellular infrastructure applications. The generalized Volterra series is reformulated with respect to the discrete time domain to allow impendent specification of memory depth for each kernel. A memory fading concept is then adopted to align memory depth to increasing kernel order. The number of Volterra coefficients needed to represent a strong PA non-linearity are significantly reduced (to a manageable level), while retaining certain high order kernels essential for realizing exceptional model fidelity. Results show model residuals better than -60 dBc for single- and two-carrier WCDMA signals when applied to a 350 W LDMOS Doherty power amplifier circuit.