IP Prefix Matching with Binary and Ternary CAMs

Ternary Content Addressable Memories (CAMs) are widely used in high-speed routers. They allow a longest-prefix matching operation to complete within a single clock cycle. However, TCAMs are costly and their power consumption is very high. In this paper, we identify two kinds of redundancy in the usage of TCAMs in IP route lookup, and propose a hybrid scheme which combines Binary CAMs and Ternary CAMs to reduce the total area and power consumption. We also introduce shared memory blocks for further simplification of the lookup circuit. The simulation result shows that our approach can save more than 50% of transistors in CAMs, compared with the traditional way, and that it reduces the critical path in IP route lookup significantly.