An improved 3 V 2 GHz image reject mixer and a VCO-prescaler fully integrated in a BiCMOS process

An improved image reject mixer and a VCO-prescaler circuits are described in this paper. For the image reject mixer, a novel combination of 90/spl deg/ phase shifter networks and a gain control system are used to obtain 45 dB image rejection in a 200 MHz bandwidth centered at 2 GHz for a 200 MHz intermediate frequency (IF). Furthermore, the gain control system allows a 35 dB min. image rejection for IF adjustment from 150 MHz to 250 MHz. The power consumption is 45 mW with a 3 V power supply. For the VCO, a very simple fully integrated LC architecture is used. The circuit exhibits a low phase noise (-83 dBc/Hz at 100 kHz offset from the 2 GHz carrier). In addition, a large frequency tuning range (100 MHz) is obtained, without capacitor switching, by using voltage-controlled MOS capacitors. The output differential voltage is 80 mV. The power consumption is 12 mW with a 3 V power supply. The two functions were recently fully integrated on one chip in a BiCMOS process.