A low dropout linear regulator with high power supply rejection

Combining the supply ripple subtraction and high-pass filtering can improve the power supply rejection (PSR) over wideband frequency of low dropout regulator (LDO). The proposed LDO is fabricated by TSMC 0.35µm 2-poly 4-metal CMOS process. The simulation results at maximum load current of 100mA, show that PSR at 10k, 100k and 1M are −72dB, −75dB and −46dB,respectively. Therefore, it's well suited for switching pre-regulator and SoC applications. The active area of this LDO is 300×360µm².