A low power logarithmic A/D converter

The architecture of a new logarithmic analog-to-digital converter employing a successive approximation algorithm is presented. We used a mixed capacitor-array, resistor-string structure for the logarithmic conversion. The converter was derived from its linear counterpart by modifying of the conversion algorithm. Computer simulations show that the proposed approach is suitable to design high quality audio converters in low power low voltage applications. A prototype of the converter has been implemented in a 1.6 /spl mu/m single poly double metal CMOS technology.