Research and design of level converter circuit for I/O ports

A level converter circuit for I/O ports from 3.3 V LVTTL logic to 1.8 V CMOS logic with TSMC 0.18 um CMOS process has been designed. Level converter circuit has been integrated in an integrated circuit, which use single supply voltage. A positive feedback circuit similar to the Schmitt flip-flop is adopted to realize the level conversion, which also acts as both a buffer and a waveform shaping role. ESD protection circuit is implemented by the diode and resistor circuit structure traditionally. Signal acquisition circuit use a D flip-flop consisted of the structure of CMOS transmission gate. A number of suitable buffers are used to link up them. The circuit has been used in an IC, which works on 250 MHz. The result shows that design satisfies design requirement exactly.