Optium design of Doherty amplifiers based on average power efficiency

This paper presents a design approach of Doherty amplifier, which is based on optimizing the average power efficiency instead of peak power efficiency by adjusting the offset lines located in the branches of the carrier and the peak amplifier. The back-off point of the Doherty amplifier, which can be shifted by tuning the offset lines, should be optimized according to the power probability distribution of the modulated signal so as to achieve the maximum average power efficiency. A Doherty amplifier is designed using Freescale's MRF281S 4-W LDMOS FETs and the test signal is a TD-SCDMA signal at 2017.5MHz. The validation result of the Doherty amplifier show that the average power efficiency is 31.2 % at 9dB back-off point. The power efficiency enhances 4.2% and 3.9%, respectively, comparing with 27% at the 6dB back-off point and 27.3% at the 13 dB back-off point.