Design of an integrated demodulator for a 13.56 MHz RFID reader

An integrated demodulator for 13.56 MHz RFID reader is designed in 0.18 um CMOS technology. The design is mainly composed of a detector and an amplifier. The chip operates at 2 V p-p and occupies an area of 0.536 mm². Results show smaller ripple (<0.2%) and faster settling time than that of existing systems.