EDA for analog DFT? - designers must get on the bus

Design for test (DFT) for analog functions lags far behind that for digital functions, and as a result there is virtually no automation (except BIST for SerDes, PLL, and DDR). Before such automation can be developed, we must first understand the reasons for this lag and address them, since without a widely used technique, EDA companies cannot develop truly useful DFT automation. Analog design has no general-purpose DFT technique comparable to digital's scan-based design and testing. The closest possibility is the analog bus, but it is often inadequate. Let's consider three important reasons for the lack of a general analog DFT technique.