Implementation of high-speed verification platform based on emulator for ReDSP and ReMAP

Verification of processors with high performance is becoming more and more time-consuming and even gradually turning into the bottleneck of the processor design. The Verification of Reconfiguralbe Multimedia Array Processor(ReMAP) we designed for multimedia processing and its internal component Reconfigurable DSP(ReDSP) is also no exception. A high-speed verification platform based on emulator is proposed for ReDSP and ReMAP. We demonstrate the hardware architecture of the platform and different verification modes it supports. A software verification model is proposed, and the evaluation results show a great acceleration rate compared to software simulation¹.