Designing asynchronous analog-to-digital converter with I2C interface

A concept of an asynchronous analog-to-digital converter (AADC) with on-chip hardware I²C-bus interface is presented in the paper. To our knowledge, this is the first concept enabling the operation of the AADC in the I²C communication system. Since the AADCs produce output data irregularly in time, the converter interface is equipped with the ability to initiate the transmission on the I²C bus as a hardware master. We assign the master-transmitter mode to the AADC I²C interface as a basic mode of operation, and the optional slave-receiver mode to configure the converter and its interface.