Implementation and ESL Verification of New Earliest-Deadline-First Scheduler for Video Streaming over Wireless Networks

We propose a cost-effective and new Earliest-Deadline First (EDF) hardware scheduler with low power and low circuit area advantages as well as an electronic system level (ESL) verification framework for co-exploring algorithms and architectures of wireless multimedia embedded systems. In the proposed ESL platform, a network simulator alleviates both benchmarking and deployment of wireless network environment when fitting a Silicon Intellectual Property (SIP) prototype to the Field-Programmable Gate Array (FPGA). An IEEE 802.11e HCCA case study show that we efficiently approach optimal collaborations between media access control (MAC) and the new EDF scheduling algorithm to achieve low power objective based on the algorithm and architecture codesign.