A 64 channels 14-bit 50 MS/sec data acquisition card with real time processing in VME form factor

A 64 channels digitizer card has been designed for the readout of auxiliary detectors at the TRIUMF ISACII TIGRESS facility. The card has been optimized for the readout of silicon strip detectors and scintillator arrays. However, it is general enough in functionality to be adaptable for most applications. Each channel consist of a 50 MS/sec 14-bit ADC with LVDS serial output (at 700 MHZ). The high density of the card is made possible by the use of small footprint octal ADC chips. Groups of 4 octal ADC's have their fast serial outputs connected to Altera Stratix FPGA'S that read out the data streams and perform the required real time processing of the digitized signals. For the silicon detector application, the processing is essentially to apply pole-zero compensation, perform the digital filtering of the preamplifiers pulse shapes, evaluate the charge, and calculate a time stamp. The module is laid out in the standard VME 6U 4HP format, and consists of two types of assemblies: a VME carrier board that contains a data assembler, general services and I/O interfaces, and two mezzanines that contain the ADC's and the signal processing FPGA's. The module can be accessed through the VME bus, but also has a fast CAT6 serial LVDS serial communication link compatible with the TIGRESS readout system.