Optimizing speed and consumption of QDI controllers using direct mapping synthesis

In this paper, an optimized controller synthesis based on a direct mapping technique is proposed. This method exploits sequential communicating components, called sequencers. Contrarily to existing methods, this approach is able to guarantee the delay insensitive property and so the robustness. At the same time this method achieves a lower power consumption using a reasonable area. This paper introduces the sequencer implementation, the synthesis algorithm and an example. The proposed method is evaluated and compared to a classical technique. The studied example is a shift controller, the circuit was implemented using the 130 nm CMOS ST Technology, and was electrically simulated using nanosim.