Design and optimization of a low complexity all-digital digital-to-analog converter

This paper presents a novel all-digital circuit topology for a digital-to-analog converter (DAC). It consists of series of inverters whose outputs are connected together. Depending on the thermometer code input, some inverters will have conducting PMOS whereas others will have conducting NMOS, thus providing an analog output. Even though the system is inherently non-linear, mathematical optimization has been done in order to improve its linearity. Due to process and temperature variations, the proposed DAC has a resolution that is limited to 3 bits in a 0.18 mum CMOS technology. Transistor-level simulations using Cadence's Spectre simulator have also been done to validate the theoretical results.