First demonstration of a fast response/locking burst-mode physical-layer chipset for emerging 10G PON standards

This paper reviews the system-level requirements and challenges for next-generation coexistence 10G PON, and demonstrates for the first time a fast response/locking burst-mode physical-layer chipset to operate at various worst-case conditions for either IEEE 10G EPON or FSAN 10G NG-PON standards.