An improved path sensitization method in test pattern generation for combinational circuits

We present a fast sensitized path decision method for test pattern generation of combinational circuits. This method accelerates any path sensitization test pattern generation (ATPG) algorithm, such as D-algorithm, PODEM, FAN, or SOCRATES. The essential idea of our method is to propagate the fault on a stem (fanout node) to all its fanout-branches and to desensitize one or more input lines of a reconvergent gate when the fault effect can not propagate through the gate. In this way, the time for selecting paths to be sensitized can be reduced.