System level design, a VHDL based approach

A hierarchical system design flow was developed to facilitate concurrent development and time-to-market reductions. The system design flow provides for codesign of (embedded) driver software, digital hardware, and analogue hardware. The flow starts from a prosaic functional target specification, which is formally recorded in a system algorithm, in VHDL. Through functional decomposition and partitioning, individual parts of the system algorithm are projected onto software, digital hardware, and analogue hardware design flows, all based on VHDL. The hierarchical flow was applied to the design of channel and source decoding systems for digital video broadcast applications.