High-speed real-time data acquisition system based on FPGA

High-speed data acquisition system is designed with the FPGA device EP2S180 as controlling unit. In order to heighten data acquisition speed, four pipelined architecture high-speed AD devices is adopt acted on the state machine and phase delay clock which is designed based on FPGA device. The conversion storage data in the coach composed of block RAM in the EP2S180 is transferred to main memory by the DDR controller. The DDR controller is also designed based on FPGA device. The frequency of the data acquisition system can reach 700 MHz, and carry on data acquisition real time.