Improved Delta Sigma Modulators for high speed applications

This article presents a new Low-Pass Delta Sigma Modulators (LPDS) architecture to improve the noise shaping for high frequency applications. The errors resulting from approximations made by calculating with 1/2^N coefficients are compensated. Simulations with extracted parasitics of the layout are made and give a SNDR of 111 dB, 3.8 mW power consumption at 4 GHz in 65 nm CMOS technology for UMTS standard.