10 Gb/s framer/demultiplexer IC for SONET STS-192 applications

This paper presents the first ever reported 10 Gb/s SONET framer/demultiplexer IC which integrates the functions of serial to parallel conversion, byte alignment and frame detection on a single chip. This IC identifies the SONET framing pattern from the input STS-192 data stream, and converts the serial input bit stream into a byte-parallel, frame-synchronized output data stream. It is implemented using a high-current gain baseline AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology, consumes approximately 3 W of power using a -5.2 V supply, has a phase margin of 270/spl deg/ and differential input sensitivity of 100 mV/sub p-p/ at 10 Gb/s.