Low phase noise frequency synthesiser for the Trapped Atom Clock on a Chip

We report on the realisation of a 6:834 GHz synthesis chain for the Trapped Atom Clock on a Chip (TACC) that is being developed at LNE-SYRTE. The stability of the chain is 10^-14 at 1 s, one order of magnitude below the stability goal of TACC. This ensures that the synthesizer will not be a limiting factor of the clock performance. The chain is based on the frequency multiplication of a 100 MHz reference signal to 6:4 GHz. It uses a comb generator based on a monolithic GaAs non-linear transmission line. This is a novelty in the fabrication of high stability microwave synthesisers.