aBCD18 - An advanced 0.18um BCD technology for PMIC application

We present a new advanced 0.18 um BCD(Bipolar-CMOS-DMOS) technology with the key features being a 40 V HV-MOS and an SSTC(Sidewall Selective Transistor Cell) type EEPROM as well as complimentary available analog devices such as a high gain BJT, 4fF/um² MIM capacitor, and 10k Omega/sq. poly resistor. To reduce device area and enhance latch up immunity, a 15 um depth deep trench isolation process has been developed, which will help to significantly reduce the chip size.