Measuring and compensating for process mismatch-induced, reference spurs in phase-locked loops using a sub-sampled DSP

A DSP method based on sub-sampling followed by M-point FFT of the sub-sampled signal is used to reduce the phase-locked loop's reference spur. To validate the system's effectiveness a digital calibration loop in SIMULINK is designed. The results show that the reference spur can be improved by 22 dBc with a 1% residual current mismatch and a 1 nA net value of leakage current.