New logarithmic two-step flash A/D converter with digital error correction for MOS technology

A new technique for realising in MOS technology a logarithmic analog-to-digital (A/D) converter employing a two-step flash architecture suitable for high-frequency operation is described. While the logarithmic operation is achieved by replacing the linear operations of subtraction and multiplication by simple scaling operations, the use of digital error correction techniques allows one to achieve high resolution and high dynamic range performance. An example is given to illustrate the proposed technique.