Versatile low voltage low power op-amp design

In this chapter we will look at low voltage operational amplifier design from a system level approach. Based on the system and application, the most suitable amplifier structure will change, and we will introduce an architecture that is modular in nature, and thus can easily be modified for a given application. The trade-off between performance and cost will be illustrated with a basic architecture which will be modified to meet various amplifier requirements. All designs were done in a standard CMOS process without low threshold or depletion mode devices. First, a single ended audio driver capable of driving an AC coupled 160 /spl Omega/, 100 pF load to within 0.15 V of the rails with less than 0.02% THD at 3 kHz is presented. This amplifier operates at a supply range from 2.3 to 5.5 V with a quiescent current of 350 /spl mu/A. Next we look at a low noise fully balanced amplifier optimized to drive large capacitive loads at high speeds with a minimum quiescent current, suitable for sampled data systems. This amplifier could drive a 50 pF load at about 35 V//spl mu/-sec /spl plusmn/3 V in a 3.3 V environment with a quiescent current of 450 /spl mu/A. Finally, an input/output rail-to-rail fully balanced amplifier is presented suitable for low noise, audio applications, such as pre-amplifiers, single ended to fully balanced converters, and continuous time filters. Less then 0.003% THD was achieved in the audio range driving a 10 k/spl Omega/, 15 pF load to within 0.1 V of the rails with a quiescent current of 300 /spl mu/A.