Load-aware bidirectional pipeline construction for terabit IP forwarding

IP forwarding with longest prefix matching (LPM) is the kernel function of routers in Internet. Most LPM algorithms can be implemented by some form of tree traversal, whose throughput can be improved dramatically by being pipelined. On the other hand, balancing the memory allocation over the pipeline stages has been identified as a major challenge for scalable solutions. Most of previous pipelining schemes balance the memory distribution across stages at the cost of lowering the worst-case throughput. This paper proposes a SRAM-based bidirectional pipeline architecture with load-aware dynamic construction to improve dramatically the throughput. Simulation experiments show that, the architecture can achieve a perfectly balanced memory distribution over the stages, store 150 K unique route prefixes using 2 MB of memory, and realize a high throughput of 1.2 Tbps for minimum size (40 bytes) packets.