A circuit design to suppress asymmetrical characteristics in high-density DRAM sense amplifiers

A circuit design technique for suppressing asymmetrical characteristics in a high-density DRAM sense amplifier is discussed, and the effect of drain current imbalances between transistor pairs and the sensitivity of the sense amplifier are studied experimentally. A sense amplifier composed of parallel transistor pairs which have a reversed source and drain arrangement on a wafer is capable of suppressing the asymmetry effects to less than 15 mV in a range of submicrometer gate lengths and of reducing the layout area by about 43% compared with the conventional sense amplifier.<>