High level CAD melds microsystems with foundries

Computer-aided-design (CAD) software is needed to design microsystems without excessive complexity and design time. Currently available CAD tools, such as Cadence DF2 or Mentor Falcon Framework, need modifications before they can be used for the automated design of micromachined devices. Work at the CMP has extended the capabilities of Cadence OPUS to microsystem technology. The user is able to generate layout of a microsystem including electronic and non-electronic parts in a commonly used format (GDS2, CIF), run an extended DRC which submits the layout to design rules checks in process aspects and electrical aspects and, finally, extract parameters from the layout level to the netlist level. The extended extractor recognises electronic components as well as microstructures, such as bridges, cantilevers and membranes. A netlist is generated and the simulation can be executed by the means of parametrized behavioural models of these microstructures. Finally, a parametrized cells library has been built. These advances are described in the paper.