SMT process recommendations. Defect minimization methods for a no-clean SMT process

Key competitive advantages can be obtained through the minimization of process defects and disruptions. In today's electronic manufacturing processes there are many variables to optimize. By gaining an understanding of what the defects are, and where they come from, is a key step in the process towards defect free/six sigma manufacturing. In the last decade, surface mount technology processes have been slowly converting towards the no-clean philosophy. This new trend has spawned new processing issues which need to be addressed. This paper investigates solutions to current problems in the processing of no-clean SMT processes. These solutions will be critical in the development of successful processes in the electronics industry in the years ahead.