A digitally-controlled 20 b dynamic range BiCMOS stereo audio processor

The authors describe a stereo audio processor chip with analog performance that is achieved by a tradeoff among several important requirements including distortion, noise, DC offsets and crosstalk. In the system, each source selector has seven audio inputs and three buffered outputs. A fourth source selector output is connected to a programmable volume controller with an amplification range between +23 dB and -79 dB in 1-dB steps. The I/sup 2/C transceiver provides communication with a microcontroller by means of a two-wire serial bus. The decoder stores and decodes the received control data and drives the switches in the analog blocks. The digital part also contains a power-on-reset and power-dip control. The system architecture is determined by the low distortion target. The chip's performance is summarized in a table.<>