A 16 Mb/s data detector and timing recovery circuit for token ring LAN

A 1.75- mu m CMOS interface circuit for a differential Manchester-coded 16-Mb/s token-ring local area network (LAN) is presented. The chip provides fixed gain and slicing functions as well as integrated clock recovery, data timing, and lock detection. When it is used in tandem with a digital controller/driver chip, a complete 16-Mb IEEE 802.5-1988 standard-compatible token-ring transceiver is realized. Block-level functionality of the interface circuit is discussed, following by more detailed subcircuit descriptions and a presentation of measured results. The measured jitter transfer function of the PLL phase-locked to a high-transition-density data stream is shown.<>