Spread spectrum clock generator for DisplayPort

This paper describes a spread spectrum clock generator (SSCG) for the DisplayPort transmitter system. The proposed architecture generates the spread spectrum clock using a fractional-N PLL. The SSCG uses a digital 2nd order MASH 1-1 sigma-delta modulator and 9 bit Up/Down counter. The SSCG generates clocks at 270 MHz and 162 MHz with 0.25% down-spreading with triangular waveform frequency modulation of 33 KHz for DisplayPort transmitter system. And the peak power reduction is about 5 dBm. The circuit has been simulated in 0.18 um CMOS technology.