Hardware Efficient Algorithm for Complex Arithmetic

There has been high demand for low power and area efficient implementation of complex arithmetic operations in many Digital Signal Processing applications. The CORDIC (COordinate Rotation DIgital Computer) Algorithm is a unique technique for performing various complex arithmetic functions using shift-add iterations. This paper proposes an enhanced version of new CORDIC algorithm (obtained from conventional CORDIC by using Taylor series expansion of sine and cosine functions) discussed in [1]. The recursive architecture implementation of the revised new CORDIC algorithm improves the throughput by 50% as compared to the previous design. Revised algorithm, VLSI implementation of the design and its performance comparison with [1] are discussed.