A Hybridized Linear Prediction Code Speech Synthesizer

Hazeltine Corporation has developed a hybrid version of a 2400 bps Linear Prediction Code (LPC) speech synthesizer for use in the airborne tactical environment as part of EJS. The unit's key features include: minimal throughput delay, internal and external LPC frame synchronization capability, automatic Reed-Solomon decoder frame synchronization, data synchronization maintenance, and system control. A Diagnostic Rhyme Test Score of 87 was obtained for the LPC-10 vocoder. The built-in-test (BIT) provides 80 percent fault isolation and detection. The hybrid form of this unit measures 2 inches square and consumes less than 3 (2.2 typical) wattsusing the CMOS version of the TMS32010 digital signal processor, which is part of the TMS320 processor family.