Baseband Implementation of a Fast Acquisition Carrier Tracking Loop

The quasi stable lock state of conventional PLL'S is eliminated by using a phase error detection/error correction circuit in which the demodulated I and Q phase signals are rotated to the correct phase state. The signal information for the phase rotator is derived from a data estimation network that makes an estimate of the sine and the cosine of the demodulator phase error. Approximately 10 symbol times are required for the phase correction feedback network to stabilize at which time a conventional PLL network is activated to provide the tracking signal. Computer simulation and hardware results indicate a probability of synchronization failure of less than 10^-8 for QPSK signals operating at a 12 dB Eb/No. The hardware design supports operation up to 100 megasymbols/second.