Programmable architectures for large-scale implementations of Spiking Neural Networks

FPGA devices have emerged as a popular platform for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, offering the key requirement of reconfigurability. However, FPGAs do not efficiently realise the biologically plausible neuron and synaptic models of SNNs, and current FPGA routing structures cannot accommodate the high levels of inter-neuron connectivity inherent in complex SNNs. This paper highlights and discusses the current challenges of implementing large scale SNNs on reconfigurable FPGAs. The paper proposes a novel, large scale Field Programmable Neural Network (FPNN) architecture, incorporating low power analogue synapses and SNN neurons, interconnected using a Network on Chip architecture for SNN spike packet routing and SNN configuration. Initial results on the scalability of the proposed FPNN architecture are presented.