An Energy-efficient Buffer Cache Replacement Algorithm

Power consumption is an increasingly impressing concern for data servers as it directly affects running costs and system reliability. Prior studies have shown that most memory space on data servers are used for buffer caching and thus cache replacement becomes critical. This paper investigates the tradeoff between these two interacting factors and proposes an energy-aware cache replacement algorithm. On a cache miss, it evicts a victim block from the most recently accessed memory chip. Simulation results based real-world TPC-R I/O trace show that our algorithm can save up to 12.2% energy with marginal degradation in hit rates.