Accurate RF-MOSFET Back-End Parasitic De-Embedding Based on Cold Bias Technique

In this paper, a de-embedding procedure is proposed to accurately extract the small signal equivalent circuit of advanced MOSFETs up to 110 GHz. This efficient procedure is easy to implement using one "open" and one "short" dummy structure, and the characteristics of the p and n type MOSFET structures under measurement biased in cold state. The de-embedding of external parasitics (probe pads, and top-down metallic interconnections and via holes) futures an important decrease of the measurement time and of the silicon occupation area, and is in particular suitable for industrial test. The method has been validated in the case of 40 nm n-p-MOSFETs and is proved to be efficient up to 110 GHz.