Impact of gate stack configuration onto the rf/analog performance of ISE MOSFET

In this paper, the impact of gate stack configuration onto the RF/analog and large signal linearity characteristics of insulated shallow extension (ISE) MOSFET is explored. The key factors affecting the device performance and the physics behind it are also scrutinized. The analog performance metrics- g_m/i_ds, r_out, v_ea (early voltage) & g_m/g_d gain and device linearity metrics-vip₂ & vip₃ and intermodulation distortion-imd3 of the said device have been studied facilitating the selection of bias point for improved RF/analog performance.