Fully integrated digital controller IC for buck converter with a differential-sensing ADC

A low-power and high-speed ADC is crucial in a digital controller IC design. The Self-Strobe Delay-Line (SSDL) ADC architecture has been used because of its low-power and high-speed characteristics. However, the transconductance gain of the V-I converter in the SSDL ADC have not been optimized to have high sensitivity with low power consumption. In this paper, a differential sensing circuit was designed to obtain high transconductance gain without costing extra power and chip area. With the improved ADC, the digital controller IC was implemented with 0.35 mum CMOS process. Measurement results show that the 4 MHz, 600 mA buck converter operates properly with the 50 mV precision ADC and LC value of 2.2 muH and 220 nF.