APV5-RH - a 128 channel analogue pipeline for LHC

A 128 Channel ASIC has been designed for the read-out of silicon strip detectors at the LHC. The circuit is based on the proven concept of "slow" shaping and stored sample deconvolution. It features a new 40 MHz analogue multiplexer to output all 128 channels through a single connection. The circuit is being fabricated on Harris AVLSIRA radiation hardened technology, which has been demonstrated to meet the environmental requirements of the LHC.<>